{
  "arg_patterns":[
    [
      "(ip|dp|sp|r[0-3]),? (ip|dp|sp|r[0-3])",
      "(ip|dp|sp|r[0-3]),? #(0b[0-1]{1,8}|(0x)?[0-9]{1,3})",
      "(ip|dp|sp|r[0-3]),? [A-z][A-z0-9]*"
    ],
    [
      "(ip|dp|sp|r[0-3])"
    ],
    [
      "#(0b[0-1]{1,3}|(0x)?[0-9]{1,3})",
      "(INPUT|OVERFLOW|NEGATIVE|CARRY|ZERO)"
    ]
    [
      "(ip|dp|sp|r[0-3])",
      "#(0b[0-1]{1,8}|(0x)?[0-9]{1,3})",
      "[A-z][A-z0-9]*"
    ],
    [
      ""
    ]
  ],
  "opcodes":[
    {
      "opcode": 0b0000,
      "mnemonic":"add",
      "patterns": 0,
      "description": "Adds the immediate data, or the contents of the register given as the second operand to the register given as first operand."
    },
    {
      "opcode": 0b0001,
      "mnemonic":"sub",
      "patterns": 0,
      "description": "Subtracts the immediate data, or the contents of the register given as the third operand to the register given as the first operand."
    },
    {
      "opcode":0b0010,
      "mnemonic": "adc",
      "patterns": 0,
      "description": "Adds the two operands plus the carry flag, stores in the first operand register."
    },
    {
      "opcode":0b0011,
      "mnemonic":"subb",
      "patterns":0,
      "description": "Subtracts the second operand plus the carry flag from the first operand."
    },
    {
      "opcode":0b0100,
      "mnemonic":"nand",
      "patterns":0,
      "description":"Performs logical NAND on the two operands; stores in first operand register."
    },
    {
      "opcode":0b0101,
      "mnemonic": "xor",
      "patterns":0,
      "description":"Performs logical XOR on the two operands; stores in first operand register."
    },
    {
      "opcode":0b0110,
      "mnemonic":"sll",
      "patterns":0,
      "description":"Shifts bits in the first operand register left by the amount specified in the second operand."
    },
    {
      "opcode":0b0111,
      "mnemonic":"srl",
      "patterns":0,
      "description":"Shifts bits in the first operand register right by the amount specified in the second operand."
    },
    {
      "opcode":0b1000,
      "mnemonic":"mov",
      "patterns":0,
      "description": "Copies the register or data in the second operand into the first operand register."
    },
    {
      "opcode":0b1001,
      "mnemonic":"ldb",
      "patterns":0,
      "description":"Loads the byte into the first operand register at the address specified in the second operand."
    },
    {
      "opcode":0b1010,
      "mnemonic":"stb",
      "patterns":0,
      "description":"Stores the contents of the first operand register into the address specified in the second operand."
    }, 
    {
      "opcode":0b1011,
      "mnemonic":"push",
      "patterns":1,
      "description":"Pushes the contents of the specified register onto the stack."
    },
    {
      "opcode":0b1011,
      "mnemonic":"pop",
      "patterns":1,
      "description":"Pops the first item of the stack into the specified register"
    }, 
    {
      "opcode":0b1100,
      "mnemonic":"bflag",
      "patterns":2,
      "description": "Branches to the specified memory address if the specified flag bit is set."
    },
    {
      "opcode":0b1101,
      "mnemonic":"jmp",
      "patterns":3,
      "description":"Branches unconditionally to the specified memory address."
    },
    {
      "opcode":0b1110,
      "menmonic":"jsr",
      "patterns":3,
      "description":"Branches unconditionally to the specified memory address and push the lower 8 bits of (program counter + 2) onto the stack."
    },
    {
      "opcode":0b1111,
      "mnemonic":"setipg",
      "patterns":4,
      "description":"Sets the instruction page register to the upper 8 bits of (program counter + 4)."
    },
    {
      "opcode":0b1111,
      "mnemonic":"ret",
      "patterns":4,
      "description":"Pulls the lower 8 bits of the return address from the stack and jumps to it."


}